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bsp_ser.c
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1 /*
2 *********************************************************************************************************
3 * MICIRUM BOARD SUPPORT PACKAGE
4 *
5 * (c) Copyright 2009; Micrium, Inc.; Weston, FL
6 *
7 * All rights reserved. Protected by international copyright laws.
8 * Knowledge of the source code may not be used to write a similar
9 * product. This file may only be used in accordance with a license
10 * and should not be redistributed in any way.
11 *********************************************************************************************************
12 */
13 
14 /*
15 *********************************************************************************************************
16 *
17 * BOARD SUPPORT PACKAGE
18 * UART SERVICES
19 *
20 * LUMINARY MICRO LM3S1968 on the EK-LM3S1968
21 *
22 * Filename : bsp_ser.c
23 * Version : V1.02
24 * Programmer(s) : BAN
25 *********************************************************************************************************
26 */
27 
28 
29 /*
30 *********************************************************************************************************
31 * INCLUDE FILES
32 *********************************************************************************************************
33 */
34 
35 #define BSP_SER_MODULE
36 #include <bsp.h>
37 
38 
39 /*
40 *********************************************************************************************************
41 * LOCAL DEFINES
42 *********************************************************************************************************
43 */
44 
45 #define BSP_SER_PORT_NBR_MAX BSP_SER_ID_UART0
46 
47 #define LM3SXXXX_BASE_UART0 0x4000C000uL
48 #define LM3SXXXX_BASE_UART1 0x4000D000uL
49 #define LM3SXXXX_BASE_UART2 0x4000E000uL
50 
51 /*
52 *********************************************************************************************************
53 * REGISTER BIT DEFINES
54 *********************************************************************************************************
55 */
56 
57 #define LM3SXXXX_BIT_UARTDR_FE DEF_BIT_08
58 #define LM3SXXXX_BIT_UARTDR_PE DEF_BIT_09
59 #define LM3SXXXX_BIT_UARTDR_BE DEF_BIT_10
60 #define LM3SXXXX_BIT_UARTDR_OE DEF_BIT_11
61 
62 #define LM3SXXXX_BIT_UARTRSR_FE DEF_BIT_00
63 #define LM3SXXXX_BIT_UARTRSR_PE DEF_BIT_01
64 #define LM3SXXXX_BIT_UARTRSR_BE DEF_BIT_02
65 #define LM3SXXXX_BIT_UARTRSR_OE DEF_BIT_03
66 
67 #define LM3SXXXX_BIT_UARTFR_CTS DEF_BIT_00
68 #define LM3SXXXX_BIT_UARTFR_DSR DEF_BIT_01
69 #define LM3SXXXX_BIT_UARTFR_DCD DEF_BIT_02
70 #define LM3SXXXX_BIT_UARTFR_BUSY DEF_BIT_03
71 #define LM3SXXXX_BIT_UARTFR_RXFE DEF_BIT_04
72 #define LM3SXXXX_BIT_UARTFR_TXFF DEF_BIT_05
73 #define LM3SXXXX_BIT_UARTFR_RXFF DEF_BIT_06
74 #define LM3SXXXX_BIT_UARTFR_TXFE DEF_BIT_07
75 #define LM3SXXXX_BIT_UARTFR_RI DEF_BIT_08
76 
77 #define LM3SXXXX_BIT_UARTLCRH_BRK DEF_BIT_00
78 #define LM3SXXXX_BIT_UARTLCRH_PEN DEF_BIT_01
79 #define LM3SXXXX_BIT_UARTLCRH_EPS DEF_BIT_02
80 #define LM3SXXXX_BIT_UARTLCRH_STP2 DEF_BIT_03
81 #define LM3SXXXX_BIT_UARTLCRH_FEN DEF_BIT_04
82 #define LM3SXXXX_BIT_UARTLCRH_WLEN_5 0x00000000
83 #define LM3SXXXX_BIT_UARTLCRH_WLEN_6 0x00000020
84 #define LM3SXXXX_BIT_UARTLCRH_WLEN_7 0x00000040
85 #define LM3SXXXX_BIT_UARTLCRH_WLEN_8 0x00000060
86 
87 #define LM3SXXXX_BIT_UARTCTL_UARTEN DEF_BIT_00
88 #define LM3SXXXX_BIT_UARTCTL_SIREN DEF_BIT_01
89 #define LM3SXXXX_BIT_UARTCTL_SIRLP DEF_BIT_02
90 #define LM3SXXXX_BIT_UARTCTL_SMART DEF_BIT_03
91 #define LM3SXXXX_BIT_UARTCTL_EOT DEF_BIT_04
92 #define LM3SXXXX_BIT_UARTCTL_HSE DEF_BIT_05
93 #define LM3SXXXX_BIT_UARTCTL_LIN DEF_BIT_06
94 #define LM3SXXXX_BIT_UARTCTL_LBE DEF_BIT_07
95 #define LM3SXXXX_BIT_UARTCTL_TXE DEF_BIT_08
96 #define LM3SXXXX_BIT_UARTCTL_RXE DEF_BIT_09
97 #define LM3SXXXX_BIT_UARTCTL_DTR DEF_BIT_10
98 #define LM3SXXXX_BIT_UARTCTL_RTS DEF_BIT_11
99 
100 #define LM3SXXXX_BIT_UARTFLS_RX_1_8 0x00000000
101 #define LM3SXXXX_BIT_UARTFLS_RX_1_4 0x00000080
102 #define LM3SXXXX_BIT_UARTFLS_RX_1_2 0x00000100
103 #define LM3SXXXX_BIT_UARTFLS_RX_3_4 0x00000180
104 #define LM3SXXXX_BIT_UARTFLS_RX_7_8 0x00000200
105 #define LM3SXXXX_BIT_UARTFLS_TX_1_8 0x00000000
106 #define LM3SXXXX_BIT_UARTFLS_TX_1_4 0x00000001
107 #define LM3SXXXX_BIT_UARTFLS_TX_1_2 0x00000002
108 #define LM3SXXXX_BIT_UARTFLS_TX_3_4 0x00000003
109 #define LM3SXXXX_BIT_UARTFLS_TX_7_8 0x00000004
110 
111 #define LM3SXXXX_BIT_UARTINT_RX DEF_BIT_04
112 #define LM3SXXXX_BIT_UARTINT_TX DEF_BIT_05
113 #define LM3SXXXX_BIT_UARTINT_RT DEF_BIT_06
114 #define LM3SXXXX_BIT_UARTINT_FE DEF_BIT_07
115 #define LM3SXXXX_BIT_UARTINT_PE DEF_BIT_08
116 #define LM3SXXXX_BIT_UARTINT_BE DEF_BIT_09
117 #define LM3SXXXX_BIT_UARTINT_OE DEF_BIT_10
118 
119 
120 /*
121 *********************************************************************************************************
122 * LOCAL CONSTANTS
123 *********************************************************************************************************
124 */
125 
126 
127 /*
128 *********************************************************************************************************
129 * LOCAL DATA TYPES
130 *********************************************************************************************************
131 */
132 
133 typedef struct lm3sxxxx_struct_uart {
134  CPU_REG32 DR;
135  CPU_REG32 RSR_ECR;
136  CPU_REG32 Dummy1;
137  CPU_REG32 Dummy2;
138  CPU_REG32 Dummy3;
139  CPU_REG32 Dummy4;
140  CPU_REG32 FR;
141  CPU_REG32 Dummy5;
142  CPU_REG32 ILPR;
143  CPU_REG32 IBRD;
144  CPU_REG32 FBRD;
145  CPU_REG32 LCRH;
146  CPU_REG32 CTL;
147  CPU_REG32 IFLS;
148  CPU_REG32 IM;
149  CPU_REG32 RIS;
150  CPU_REG32 MIS;
151  CPU_REG32 ICR;
152  CPU_REG32 DMACTL;
153 } LM3SXXXX_STRUCT_UART;
154 
155 
156 /*
157 *********************************************************************************************************
158 * LOCAL TABLES
159 *********************************************************************************************************
160 */
161 
162 
163 /*
164 *********************************************************************************************************
165 * LOCAL GLOBAL VARIABLES
166 *********************************************************************************************************
167 */
168 
169 
170 /*
171 *********************************************************************************************************
172 * LOCAL FUNCTION PROTOTYPES
173 *********************************************************************************************************
174 */
175 
176 
177 /*
178 *********************************************************************************************************
179 * LOCAL CONFIGURATION ERRORS
180 *********************************************************************************************************
181 */
182 
183 
184 /*
185 *********************************************************************************************************
186 * BSP_SerInit()
187 *
188 * Description : Initialize UART.
189 *
190 * Argument(s) : port_id Port to initailize.
191 *
192 * baud_rate Baud rate.
193 *
194 * Return(s) : DEF_YES, if UART initialized.
195 & DEF_NO, otherwise.
196 *
197 * Caller(s) : Application.
198 *
199 * Note(s) : none.
200 *********************************************************************************************************
201 */
202 
203 CPU_BOOLEAN BSP_SerInit (CPU_DATA port_id,
204  CPU_INT32U baud_rate)
205 {
206  LM3SXXXX_STRUCT_UART *uart;
207  CPU_INT32U idiv;
208  CPU_INT32U fdiv;
209  CPU_INT32U clk_freq;
210 
211 
212 
213  if (port_id > BSP_SER_PORT_NBR_MAX) {
214  return (DEF_NO);
215  }
216 
217 
218  /* --------------- COMPUTE DIV BAUD RATE -------------- */
219  clk_freq = BSP_CPU_ClkFreq();
220  idiv = clk_freq / (16u * baud_rate);
221  fdiv = clk_freq % (16u * baud_rate);
222  fdiv = ((((2u * fdiv * 4u) / baud_rate) + 1u) / 2u);
223 
224 
225  /* --------------------- INIT PORT -------------------- */
226  switch (port_id) {
227  case BSP_SER_ID_UART0:
228  SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
229  SysCtlPeripheralReset(SYSCTL_PERIPH_UART0);
230  SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
231  GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
232  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART0;
233  break;
234 
235 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART1)
236  case BSP_SER_ID_UART1:
237  SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
238  SysCtlPeripheralReset(SYSCTL_PERIPH_UART1);
239  SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
240  GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3);
241  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART1;
242  break;
243 #endif
244 
245 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART2)
246  case BSP_SER_ID_UART2:
247  SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
248  SysCtlPeripheralReset(SYSCTL_PERIPH_UART2);
249  SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
250  GPIOPinTypeUART(GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1);
251  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART2;
252  break;
253 #endif
254 
255  default:
256  return (DEF_NO);
257  }
258 
259  uart->IBRD = idiv;
260  uart->FBRD = fdiv;
261  uart->LCRH = LM3SXXXX_BIT_UARTLCRH_WLEN_8
262  | LM3SXXXX_BIT_UARTLCRH_FEN;
263  uart->FR = 0x00000000;
264  uart->CTL = LM3SXXXX_BIT_UARTCTL_RXE | LM3SXXXX_BIT_UARTCTL_TXE | LM3SXXXX_BIT_UARTCTL_UARTEN;
265  uart->IFLS = 0x00000000;
266  uart->ICR = LM3SXXXX_BIT_UARTINT_OE | LM3SXXXX_BIT_UARTINT_BE | LM3SXXXX_BIT_UARTINT_PE |
267  LM3SXXXX_BIT_UARTINT_FE | LM3SXXXX_BIT_UARTINT_RT | LM3SXXXX_BIT_UARTINT_TX | LM3SXXXX_BIT_UARTINT_RX;
268 
269  return (DEF_YES);
270 }
271 
272 
273 /*
274 *********************************************************************************************************
275 * BSP_SerRd()
276 *
277 * Description : Read octet(s) from UART.
278 *
279 * Argument(s) : port_id Port to read from.
280 *
281 * p_dest Pointer to destination buffer.
282 *
283 * size Number of octets to read.
284 *
285 * Return(s) : The number of octets read.
286 *
287 * Caller(s) : Application.
288 *
289 * Note(s) : none.
290 *********************************************************************************************************
291 */
292 
293 CPU_SIZE_T BSP_SerRd (CPU_DATA port_id,
294  void *p_dest,
295  CPU_SIZE_T size)
296 {
297  LM3SXXXX_STRUCT_UART *uart;
298  CPU_INT08U *p_dest_08;
299  CPU_SIZE_T cnt;
300  CPU_INT08U datum;
301  CPU_INT32U fr;
302 
303 
304  if (port_id > BSP_SER_PORT_NBR_MAX) {
305  return (DEF_NO);
306  }
307 
308  switch (port_id) {
309  case BSP_SER_ID_UART0:
310  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART0;
311  break;
312 
313 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART1)
314  case BSP_SER_ID_UART1:
315  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART1;
316  break;
317 #endif
318 
319 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART2)
320  case BSP_SER_ID_UART2:
321  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART2;
322  break;
323 #endif
324 
325  default:
326  return (0u);
327  }
328 
329 
330  p_dest_08 = (CPU_INT08U *)p_dest;
331  cnt = 0u;
332  while (cnt < size) {
333  fr = uart->FR;
334  while (DEF_BIT_IS_SET(fr, LM3SXXXX_BIT_UARTFR_RXFE) == DEF_YES) {
335  BSP_OS_Dly_ms(1u);
336  fr = uart->FR;
337  }
338  datum = (CPU_INT08U)uart->DR;
339  *p_dest_08 = datum;
340  p_dest_08++;
341  cnt++;
342  }
343  return (cnt);
344 }
345 
346 
347 /*
348 *********************************************************************************************************
349 * BSP_SerRdLine()
350 *
351 * Description : Read line from UART.
352 *
353 * Argument(s) : port_id Port to read from.
354 *
355 * p_dest Pointer to destination buffer.
356 *
357 * size Maximum number of octets to read.
358 *
359 * Return(s) : The number of octets read.
360 *
361 * Caller(s) : Application.
362 *
363 * Note(s) : none.
364 *********************************************************************************************************
365 */
366 
367 CPU_SIZE_T BSP_SerRdLine(CPU_DATA port_id,
368  void *p_dest,
369  CPU_SIZE_T size)
370 {
371  LM3SXXXX_STRUCT_UART *uart;
372  CPU_INT08U *p_dest_08;
373  CPU_SIZE_T cnt;
374  CPU_INT08U datum;
375  CPU_INT32U fr;
376  CPU_BOOLEAN print;
377 
378 
379  if (port_id > BSP_SER_PORT_NBR_MAX) {
380  return (DEF_NO);
381  }
382 
383  switch (port_id) {
384  case BSP_SER_ID_UART0:
385  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART0;
386  break;
387 
388 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART1)
389  case BSP_SER_ID_UART1:
390  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART1;
391  break;
392 #endif
393 
394 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART2)
395  case BSP_SER_ID_UART2:
396  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART2;
397  break;
398 #endif
399 
400  default:
401  return (0u);
402  }
403 
404 
405  p_dest_08 = (CPU_INT08U *)p_dest;
406  cnt = 0u;
407  while (cnt < size - 1u) {
408  fr = uart->FR;
409  while (DEF_BIT_IS_SET(fr, LM3SXXXX_BIT_UARTFR_RXFE) == DEF_YES) {
410  BSP_OS_Dly_ms(1u);
411  fr = uart->FR;
412  }
413  datum = (CPU_INT08U)uart->DR;
414 
415  print = ASCII_IS_PRINT(datum);
416  if (print == DEF_YES) {
417  *p_dest_08 = datum;
418  p_dest_08++;
419  BSP_SerWr(port_id, (void *)&datum, 1);
420  } else {
421  if (datum == ASCII_CHAR_BACKSPACE) {
422  if (cnt > 0u) {
423  BSP_SerWr(port_id, (void *)"\b \b", 3);
424  cnt--;
425  }
426  } else if (datum == ASCII_CHAR_CARRIAGE_RETURN) {
427  *p_dest_08 = (CPU_CHAR)ASCII_CHAR_NULL;
428  return (cnt);
429  }
430  }
431  cnt++;
432  }
433  *p_dest_08 = (CPU_CHAR)ASCII_CHAR_NULL;
434  return (cnt);
435 }
436 
437 
438 /*
439 *********************************************************************************************************
440 * BSP_SerWr()
441 *
442 * Description : Write octet(s) to UART.
443 *
444 * Argument(s) : port_id Port to write to.
445 *
446 * p_src Pointer to source buffer.
447 *
448 * size Number of octets to write.
449 *
450 * Return(s) : The number of octets written.
451 *
452 * Caller(s) : Application.
453 *
454 * Note(s) : none.
455 *********************************************************************************************************
456 */
457 
458 CPU_SIZE_T BSP_SerWr (CPU_DATA port_id,
459  void *p_src,
460  CPU_SIZE_T size)
461 {
462  LM3SXXXX_STRUCT_UART *uart;
463  CPU_INT08U *p_src_08;
464  CPU_SIZE_T cnt;
465  CPU_INT08U datum;
466  CPU_INT32U fr;
467 
468 
469  if (port_id > BSP_SER_PORT_NBR_MAX) {
470  return (DEF_NO);
471  }
472 
473  switch (port_id) {
474  case BSP_SER_ID_UART0:
475  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART0;
476  break;
477 
478 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART1)
479  case BSP_SER_ID_UART1:
480  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART1;
481  break;
482 #endif
483 
484 #if (BSP_SER_PORT_NBR_MAX >= BSP_SER_ID_UART2)
485  case BSP_SER_ID_UART2:
486  uart = (LM3SXXXX_STRUCT_UART *)LM3SXXXX_BASE_UART2;
487  break;
488 #endif
489 
490  default:
491  return (0u);
492  }
493 
494 
495  p_src_08 = (CPU_INT08U *)p_src;
496  cnt = 0u;
497  while (cnt < size) {
498  fr = uart->FR;
499  while (DEF_BIT_IS_SET(fr, LM3SXXXX_BIT_UARTFR_TXFF) == DEF_YES) {
500  BSP_OS_Dly_ms(1u);
501  fr = uart->FR;
502  }
503  datum = *p_src_08;
504  uart->DR = datum;
505  p_src_08++;
506  cnt++;
507  }
508  return (cnt);
509 }
510 
511 
512 /*
513 *********************************************************************************************************
514 * BSP_SerPrint()
515 *
516 * Description : Print to UART.
517 *
518 * Argument(s) : port_id Port to write to.
519 *
520 * p_src Pointer to source buffer.
521 *
522 * size Number of octets to write.
523 *
524 * Return(s) : The number of octets written.
525 *
526 * Caller(s) : Application.
527 *
528 * Note(s) : none.
529 *********************************************************************************************************
530 */
531 
532 CPU_SIZE_T BSP_SerPrint (CPU_DATA port_id,
533  CPU_CHAR *format,
534  /* ARGS */ ...)
535 {
536  CPU_CHAR buf[128u + 1u];
537  CPU_SIZE_T len;
538  CPU_SIZE_T len_wr;
539  va_list vArgs;
540 
541 
542  buf[0] = (CPU_CHAR)ASCII_CHAR_NULL;
543 
544  va_start(vArgs, format);
545  vsnprintf((char *)buf, sizeof(buf) - 1, (char const *)format, vArgs);
546  va_end(vArgs);
547 
548  len = Str_Len(buf);
549  len_wr = BSP_SerWr ( port_id,
550  (void *)buf,
551  len);
552 
553  return (len_wr);
554 }
555 
556 
557 /*
558 *********************************************************************************************************
559 * BSP_SerPrint()
560 *
561 * Description : Print to debug UART.
562 *
563 * Argument(s) : p_src Pointer to source buffer.
564 *
565 * size Number of octets to write.
566 *
567 * Return(s) : The number of octets written.
568 *
569 * Caller(s) : Application.
570 *
571 * Note(s) : none.
572 *********************************************************************************************************
573 */
574 
575 int BSP_Print (const char *format,
576  /* ARGS */ ...)
577 {
578  CPU_CHAR buf[128u + 1u];
579  CPU_SIZE_T len;
580  CPU_SIZE_T len_wr;
581  va_list vArgs;
582 
583 
584  buf[0] = (CPU_CHAR)ASCII_CHAR_NULL;
585 
586  va_start(vArgs, format);
587  vsnprintf((char *)buf, sizeof(buf) - 1, (char const *)format, vArgs);
588  va_end(vArgs);
589 
590  len = Str_Len(buf);
591  len_wr = BSP_SerWr ( BSP_SER_ID_UART0,
592  (void *)buf,
593  len);
594 
595  return ((int)len_wr);
596 }